The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 30, 2017
Filed:
Dec. 17, 2015
Applicant:
Craig Hanson, San Jose, CA (US);
Inventor:
Craig Hanson, San Jose, CA (US);
Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01); G11C 11/4076 (2006.01); G11C 11/4093 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4076 (2013.01); G11C 11/4093 (2013.01);
Abstract
A Dual In-Line Memory Module (DIMM) Solid State Drive (SSD) System-on-a-Chip (SoC) () is disclosed. The DIMM SSD SoC () can interoperate with a host memory controller () as though it were a traditional Dynamic Random Access Memory (DRAM) DIMM () with system interconnect skew and on-DIMM skew, even though the DIMM SSD SoC () does not have on-DIMM skew. The DIMM SSD SoC () can include variable delay elements () that can replicate the delay a traditional DRAM DIMM () experiences and that the host memory controller () expects, or a superior delay that minimizes system signal integrity issues, thereby increasing maximum system speed.