The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 30, 2017

Filed:

Apr. 22, 2014
Applicant:

Cypress Semiconductor Corporation, San Jose, CA (US);

Inventors:

Thinh Tran, Palo Alto, CA (US);

Joseph Tzou, Mountain View, CA (US);

Jun Li, Fremont, CA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 8/12 (2006.01); G11C 8/18 (2006.01); G11C 11/418 (2006.01); G11C 11/419 (2006.01); G11C 7/10 (2006.01); G11C 11/413 (2006.01);
U.S. Cl.
CPC ...
G11C 8/18 (2013.01); G11C 7/1042 (2013.01); G11C 8/12 (2013.01); G11C 11/413 (2013.01); G11C 11/418 (2013.01); G11C 11/419 (2013.01);
Abstract

A method can include storing a plurality of addresses within one cycle of a timing clock, each address corresponding to a storage location of a memory device; and following the one cycle, accessing a plurality of banks of the memory device in response to the stored addresses corresponding to different banks and preventing access to any one of the plurality of banks by more than one address of the one cycle; wherein each bank includes memory cells arranged into rows and columns that comprise the storage locations.


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