The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 30, 2017

Filed:

May. 17, 2013
Applicant:

Dell Products, Lp, Round Rock, TX (US);

Inventors:

Robert W. Hormuth, Cedar Park, TX (US);

Robert L. Winter, Burnet, TX (US);

Shawn J. Dube, Austin, TX (US);

Bradley J. Booth, Austin, TX (US);

Geng Lin, Cupertino, CA (US);

Jimmy Pike, Georgetown, TX (US);

Assignee:

Dell Products, LP, Round Rock, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 15/16 (2006.01); G06F 13/40 (2006.01); G06F 15/173 (2006.01); G06F 1/04 (2006.01); G06F 9/44 (2006.01); H04L 12/931 (2013.01); G06F 13/28 (2006.01); G06F 21/57 (2013.01); G06F 13/00 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4027 (2013.01); G06F 1/04 (2013.01); G06F 9/4401 (2013.01); G06F 13/00 (2013.01); G06F 13/28 (2013.01); G06F 13/40 (2013.01); G06F 13/4022 (2013.01); G06F 15/17331 (2013.01); G06F 21/572 (2013.01); H04L 49/00 (2013.01); Y02B 60/1228 (2013.01); Y02B 60/1235 (2013.01);
Abstract

A system includes first and second processing nodes and a network switch coupled to the first and second processing nodes via respective first and second interfaces. The network switch includes a management controller coupled to the interfaces to provide management functions to the processing nodes, first and second network interfaces coupled respectively to the first and second interfaces to provide network access for the processing nodes, a message passing interface between the first processing node and the second processing node, a storage interface coupled to the first and second interfaces to provide a storage capacity to the processing nodes, and a remote component controller coupled to the interfaces.


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