The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 30, 2017

Filed:

Dec. 04, 2015
Applicant:

Inphi Corporation, Santa Clara, CA (US);

Inventors:

Dat Tuan Mach, San Jose, CA (US);

Alejandro Lopez-Sosa, Thousand Oaks, CA (US);

Chao Xu, Thousand Oaks, CA (US);

Chien-Hsin Lee, Santa Clara, CA (US);

Assignee:

INPHI CORPORATION, Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09F 3/06 (2006.01); G06F 3/06 (2006.01); G06F 13/16 (2006.01); G06F 13/40 (2006.01); G06F 11/27 (2006.01);
U.S. Cl.
CPC ...
G06F 3/061 (2013.01); G06F 3/0604 (2013.01); G06F 3/067 (2013.01); G06F 3/0632 (2013.01); G06F 11/27 (2013.01); G06F 13/1668 (2013.01); G06F 13/4068 (2013.01);
Abstract

Techniques are described for processing signal information from a high speed communication bus. The techniques include determining spatial regions on an eye by sampling a plurality of time and voltage points to determine a two-dimensional matrix. Then, the points are assigned a numerical value from combined time and voltage functions based upon a distance from eye edges (e.g., minimum setup time requirement and minimum hold time requirement along the time dimension). Sampling to generate the matrix may comprise selecting an initial point, splitting a first margin along a first dimension into equally spaced regions, and then sampling a second margin along a second dimension into equally spaced regions. Determining the points is based on shifting a strobe signal (DQS) position and a data signal (DQ) position and running a plurality of memory built-in self test (BIST) engines and a plurality of results of BIST tests.


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