The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 23, 2017

Filed:

Feb. 26, 2015
Applicant:

Altera Corporation, San Jose, CA (US);

Inventors:

Weiqi Ding, Fremont, CA (US);

Mengchi Lui, Fremont, CA (US);

Wilson Wong, San Francisco, CA (US);

Sergey Y. Shumarayev, Los Altos Hills, CA (US);

Assignee:

Altera Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 25/03 (2006.01); H04L 7/00 (2006.01);
U.S. Cl.
CPC ...
H04L 25/03878 (2013.01); H04L 7/0054 (2013.01);
Abstract

Circuitry for receiving a high-speed serial data signal (e.g., having a bit rate in the range of about 10 Gpbs and higher) includes a two-stage, continuous-time, linear equalizer having only two serially connected stages. Phase detector circuitry may be provided for receiving the serial output of the equalizer and for converting successive pairs of bits in that output to successive parallel-form bit pairs. Further demultiplexing circuitry may be provided to demultiplex successive groups of the parallel-form bit pairs to final groups of parallel bits, which can be quite large in terms of number of bits (e.g.,parallel bits). Another aspect of the invention relates to multiplexer circuitry for efficiently going in the opposite direction from such relatively large groups of parallel data bits to a high-speed serial data output signal.


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