The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 23, 2017
Filed:
Dec. 08, 2014
Marvell International Ltd., Hamilton, BM;
Patrick A. McKinley, Corvallis, OR (US);
Marvell International Ltd., Hamilton, BM;
Abstract
A security chip including a fusible logic array. The fusible logic array is configured to receive a plurality of seed values and output a plurality of respective keys using the received plurality of seed values. The respective keys correspond to logic results generated by the fusible logic array. The fusible logic array includes one or more fusible links. A key storage control module is configured to receive the plurality of seed values, receive the plurality of respective keys, and store, in memory, a selected first seed value of the plurality of seed values and a selected first key of the plurality of respective keys. The selected first seed value and the selected first key are stored as a seed-key pair.