The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 23, 2017
Filed:
Jun. 24, 2016
Qualcomm Incorporated, San Diego, CA (US);
Burt Lee Price, Apex, NC (US);
Dhaval Rajeshbhai Shah, Raleigh, NC (US);
Yeshwant Nagaraj Kolla, Wake Forest, NC (US);
QUALCOMM Incorporated, San Diego, CA (US);
Abstract
Aspects of generating asynchronous clock signals for successive approximation register (SAR) analog to digital converters (ADCs) are disclosed. In one aspect, an asynchronous clock generator circuit is provided that is configured to receive a voltage generated by a comparator in a SAR ADC, and generate an outside-window signal in response to the voltage being outside of a voltage threshold window. The asynchronous clock generator circuit is configured to generate a trigger signal in response to the outside-window signal coinciding with the asynchronous clock signal being in an inactive state. In response to the trigger signal being in an active state for a minimum time, the asynchronous clock generator circuit is configured to generate an edge signal, and generate the asynchronous clock signal having a pulse width in response to the edge signal. The asynchronous clock generator circuit adaptively generates the asynchronous clock signal according to timing of each comparison.