The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 23, 2017

Filed:

Oct. 27, 2015
Applicant:

SK Hynix Memory Solutions Inc., San Jose, CA (US);

Inventors:

Jenn-Gang Chern, Redwood City, CA (US);

Yukeun Sim, Santa Clara, CA (US);

Assignee:

SK hynix memory solutions Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 19/00 (2006.01); G11C 7/00 (2006.01); G05F 3/26 (2006.01); G11C 7/10 (2006.01); G11C 29/02 (2006.01); G11C 29/50 (2006.01);
U.S. Cl.
CPC ...
H03K 19/0005 (2013.01); G05F 3/26 (2013.01); G11C 7/00 (2013.01); G11C 7/10 (2013.01); G11C 29/021 (2013.01); G11C 29/028 (2013.01); G11C 29/50008 (2013.01);
Abstract

A calibration device for use in a memory system includes a bias circuit providing bias current, and a calibration unit generating a control signal for calibration. The bias circuit includes an internal resistor and measures a second bias current generated by mirroring a first bias current through the internal resistor, and adjusts the second bias current to generate the second bias current in a predetermined range as a third bias current. The calibration unit generates the control signal based on a comparison result between a reference voltage and a voltage generated based on the third bias current through an adjustable resistor.


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