The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 23, 2017

Filed:

Sep. 10, 2014
Applicant:

Skorpios Technologies, Inc., Albuquerque, NM (US);

Inventors:

John Dallesasse, Geneva, IL (US);

Stephen B. Krasulick, Albuquerque, NM (US);

Timothy Creazzo, Albuquerque, NM (US);

Elton Marchena, Albuquerque, NM (US);

Assignee:

Skorpios Technologies, Inc., Albuquerque, NM (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/146 (2006.01); H01L 27/15 (2006.01); H01L 21/762 (2006.01); H01L 27/12 (2006.01); H01L 21/8258 (2006.01); H01L 21/84 (2006.01); H01L 27/06 (2006.01); H01L 21/822 (2006.01);
U.S. Cl.
CPC ...
H01L 27/14689 (2013.01); H01L 21/76254 (2013.01); H01L 21/8258 (2013.01); H01L 21/84 (2013.01); H01L 27/0688 (2013.01); H01L 27/12 (2013.01); H01L 27/14625 (2013.01); H01L 27/14634 (2013.01); H01L 27/14643 (2013.01); H01L 27/14687 (2013.01); H01L 27/15 (2013.01); H01L 21/8221 (2013.01);
Abstract

A method of fabricating a composite semiconductor structure includes providing an SOI substrate including a plurality of silicon-based devices, providing a compound semiconductor substrate including a plurality of photonic devices, and dicing the compound semiconductor substrate to provide a plurality of photonic dies. Each die includes one or more of the plurality of photonics devices. The method also includes providing an assembly substrate having a base layer and a device layer including a plurality of CMOS devices, mounting the plurality of photonic dies on predetermined portions of the assembly substrate, and aligning the SOI substrate and the assembly substrate. The method further includes joining the SOI substrate and the assembly substrate to form a composite substrate structure and removing at least the base layer of the assembly substrate from the composite substrate structure.


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