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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9659614 B1

PDFFull Text
Date of Patent:
May. 23, 2017

Filed:

Sep. 09, 2015

Integrated keeper circuit

Applicant:

Arm Limited, Cambridge, GB;

Inventors:

Nicolaas Van Winkelhoff, Grenoble, FR;

Fabien Leroy, Grenoble, FR;

Assignee:

ARM Limited, Cambridge, GB;

Attorneys:

Pramudji Law Group PLLC

Ari Pramudji

Primary Examiner:

Hoai V Ho

Assistant Examiner:

Minh Dinh

Int. Cl.
CPC ...
G11C 7/12 (2006.01);
U.S. Cl.
CPC ...
G11C 7/12 (2013.01);
Abstract

Various implementations described herein are directed to a keeper circuit coupled to a bitline input path and configured to provide a first voltage source signal to the bitline input path based on a keeper enable signal. The keeper circuit may include an NMOS transistor. Further, a logic device may be coupled to the bitline input path and configured to receive the bitline input signal, receive the first voltage source signal from the keeper circuit, and provide an inverted bitline input signal as an output signal.

Find Patent Forward Citations

Van Winkelhoff, Nicolaas. (2017). Integrated keeper circuit (U.S. Patent No. 9659614). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9659614

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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