The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 23, 2017

Filed:

Apr. 16, 2015
Applicant:

Japan Display Inc., Minato-ku, JP;

Inventors:

Tatsuya Ishii, Tokyo, JP;

Tetsuya Iizuka, Tokyo, JP;

Assignee:

Japan Display Inc., Minato-ku, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/1362 (2006.01); H01L 27/12 (2006.01); H01L 29/786 (2006.01);
U.S. Cl.
CPC ...
G02F 1/136209 (2013.01); H01L 27/124 (2013.01); H01L 27/1222 (2013.01); H01L 29/78621 (2013.01); H01L 29/78633 (2013.01); H01L 29/78645 (2013.01); H01L 29/78675 (2013.01);
Abstract

A display device includes an insulating substrate, a semiconductor layer formed of polycrystalline silicon, including a first impurity area, a second impurity area, and a channel area, an insulating film which covers the semiconductor layer, a gate electrode formed on the insulating film and opposed to the channel area, a source line electrically connected to the first impurity area, an electrode electrically connected to the second impurity area, and a light-shielding film located between the insulating substrate and the semiconductor layer, disposed at a position displaced from a position opposed to the source line, and opposed to an area including a boundary between the channel area and the second impurity area.


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