The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 16, 2017

Filed:

Apr. 29, 2015
Applicant:

Cisco Technology, Inc., San Jose, CA (US);

Inventors:

Kadaba Lakshmikumar, Basking Ridge, NJ (US);

Craig Appel, Macugie, PA (US);

Assignee:

Cisco Technology, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03F 3/45 (2006.01); H03F 3/08 (2006.01); H03F 1/02 (2006.01); H03F 1/08 (2006.01);
U.S. Cl.
CPC ...
H03F 3/08 (2013.01); H03F 1/0205 (2013.01); H03F 1/086 (2013.01); H03F 3/45076 (2013.01); H03F 3/45183 (2013.01); H03F 3/45659 (2013.01); H03F 2200/135 (2013.01); H03F 2200/75 (2013.01); H03F 2203/45026 (2013.01); H03F 2203/45082 (2013.01); H03F 2203/45088 (2013.01); H03F 2203/45116 (2013.01); H03F 2203/45208 (2013.01); H03F 2203/45221 (2013.01); H03F 2203/45336 (2013.01); H03F 2203/45402 (2013.01); H03F 2203/45418 (2013.01); H03F 2203/45434 (2013.01); H03F 2203/45436 (2013.01); H03F 2203/45481 (2013.01); H03F 2203/45594 (2013.01); H03F 2203/45604 (2013.01); H03F 2203/45642 (2013.01); H03F 2203/45648 (2013.01); H03F 2203/45664 (2013.01);
Abstract

Embodiments generally relate to a conversion arrangement, a driver arrangement, and a method of producing a complementary complementary metal-oxide-semiconductor (CMOS) output signal for driving a modulator device. The conversion arrangement includes a differential amplifier configured to produce a first amplified signal based on the differential input signal, and at least two transimpedance amplifiers (TIAs) coupled with respective outputs of the differential amplifier and configured to produce a second amplified signal based on the first amplified signal. Respective bias voltages for the TIAs are based on the first amplified signal. The conversion arrangement further includes a common-mode feedback arrangement coupled with outputs of the TIAs and configured to control the first amplified signal based on the second amplified signal, thereby controlling the bias voltages, wherein the complementary CMOS output signal is based on the second amplified signal.


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