The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 16, 2017

Filed:

Aug. 06, 2015
Applicant:

Advanced Optoelectronic Technology, Inc., Hsinchu Hsien, TW;

Inventors:

Chia-Hung Huang, Hsinchu, TW;

Ching-Hsueh Chiu, Hsinchu, TW;

Shun-Kuei Yang, Hsinchu, TW;

Po-Min Tu, Hsinchu, TW;

Shih-Cheng Huang, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 33/20 (2010.01); H01L 33/42 (2010.01); H01L 33/00 (2010.01); H01L 33/38 (2010.01);
U.S. Cl.
CPC ...
H01L 33/20 (2013.01); H01L 33/005 (2013.01); H01L 33/382 (2013.01); H01L 2933/0016 (2013.01);
Abstract

An LED die includes a substrate, a first semiconductor layer, an active layer, a second semiconductor layer, a transparent conductive layer, a first electrode and a second electrode. The first semiconductor layer, the active layer, the second semiconductor layer and the transparent conductive layer are successively formed on the substrate. The first electrode and the second electrode respectively is formed on the first semiconductor layer and the transparent conductive layer. A plurality of grooves defined on the first semiconductor layer, and a plurality of hole groups defined on the second semiconductor layer. The present disclosure also provides a method of manufacturing the LED die.


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