The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 16, 2017

Filed:

Aug. 22, 2014
Applicant:

Huawei Technologies Co., Ltd., Shenzhen, CN;

Inventors:

Zhenghai Zhang, Shanghai, CN;

Zongmin Zhang, Shanghai, CN;

Bocheng Cao, Wuhan, CN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/778 (2006.01); H01L 29/66 (2006.01); H01L 29/20 (2006.01); H01L 21/02 (2006.01); H01L 29/06 (2006.01); H01L 29/205 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7786 (2013.01); H01L 21/0237 (2013.01); H01L 21/0254 (2013.01); H01L 21/0262 (2013.01); H01L 21/02389 (2013.01); H01L 21/02458 (2013.01); H01L 21/02579 (2013.01); H01L 21/02664 (2013.01); H01L 29/0619 (2013.01); H01L 29/2003 (2013.01); H01L 29/205 (2013.01); H01L 29/66462 (2013.01);
Abstract

A gallium nitride (GaN) substrate, a semiconductor device, and methods for fabricating a GaN substrate and a semiconductor device are provided. The GaN substrate includes: a GaN base; an aluminum gallium nitride (AlGaN) layer, disposed on the GaN base; and a p-type conducting layer disposed on an active area of the AlGaN layer, and used to exhaust surface state negative electrons on the AlGaN layer and neutralize a dangling bond on the AlGaN layer. The p-type conducting layer is formed on the AlGaN layer, and a hole charge carrier in the p-type conducting layer can be used to exhaust the surface state negative electrons on an n-type AlGaN layer, neutralize the dangling bond on a section of the AlGaN layer, and prevent the forming of a virtual gate, so as to suppress a current collapse effect of the semiconductor device fabricated using the GaN substrate.


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