The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 16, 2017

Filed:

Jul. 22, 2015
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-Do, KR;

Inventors:

Seon-Ah Nam, Seoul, KR;

Sung-Hoon Kim, Hwaseong-si, KR;

Il-Ryong Kim, Seongnam-si, KR;

Kwang-You Seo, Suwon-si, KR;

Kwang-Yong Jang, Yongin-si, KR;

Assignee:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/3213 (2006.01); H01L 29/66 (2006.01); H01L 21/321 (2006.01); H01L 29/51 (2006.01); H01L 29/78 (2006.01); H01L 29/165 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66545 (2013.01); H01L 21/32134 (2013.01); H01L 21/32139 (2013.01); H01L 29/66553 (2013.01); H01L 29/66636 (2013.01); H01L 29/66795 (2013.01); H01L 21/32105 (2013.01); H01L 29/165 (2013.01); H01L 29/513 (2013.01); H01L 29/517 (2013.01); H01L 29/7848 (2013.01);
Abstract

A method of fabricating a semiconductor device includes forming a dummy gate on a substrate, forming a dummy gate mask on the dummy gate, forming a gate spacer on the substrate, the gate spacer covering at least one sidewall surface of the dummy gate and the dummy gate mask, forming a recess on at least one side of the dummy gate by etching the substrate, and forming an epitaxial layer in the recess using an epitaxial growth process. The forming of the dummy gate mask includes forming an oxide layer and a dummy gate mask layer on the dummy gate.


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