The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 16, 2017
Filed:
Oct. 22, 2013
Institute of Microelectronics, Chinese Academy of Sciences, Beijing, CN;
Haizhou Yin, Poughkeepsie, NY (US);
Abstract
A MOSFET structure and a method for manufacturing the same are disclosed. The method comprises: a. providing a substrate (); b. forming a silicon germanium channel layer (), a dummy gate structure () and a sacrificial spacer (); c. removing the silicon germanium channel layer and portions of the substrate which are not covered by the dummy gate structure () and located under both sides of the dummy gate structure, so as to form vacancies (); d. selectively epitaxially growing a first semiconductor layer () on the semiconductor structure to fill bottom and sidewalls of the vacancies (); and e. removing the sacrificial spacer () and filling a second semiconductor layer () in the vacancies which are not filled by the first semiconductor layer (). In the semiconductor structure of the present disclosure, carrier mobility in the channel can be increased, negative effects induced by the short channel effects can be suppressed, and device performance can be enhanced.