The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 16, 2017

Filed:

Jan. 29, 2016
Applicant:

Mitsubishi Electric Corporation, Tokyo, JP;

Inventors:

Yoshitaka Kimura, Tokyo, JP;

Rei Yoneyama, Tokyo, JP;

Ryo Goto, Tokyo, JP;

Akihiko Yamashita, Hyogo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/12 (2006.01); H01L 23/049 (2006.01); H01L 23/10 (2006.01); H01L 23/36 (2006.01); H01L 23/373 (2006.01);
U.S. Cl.
CPC ...
H01L 23/049 (2013.01); H01L 23/10 (2013.01); H01L 23/36 (2013.01); H01L 23/3735 (2013.01); H01L 2224/48139 (2013.01);
Abstract

It is an object to provide a power semiconductor module having a case shared for base plates of different sizes and having a high-stability base plate. The power semiconductor module according to the present invention includes: a base plate; an insulating substrate disposed on a first main surface of the base plate; a semiconductor chip disposed on an insulating substrate; a case for enclosing the base plate except a second main surface of the base plate facing the first main surface, the insulating substrate, and the semiconductor chip; and a spacer provided between the outer periphery of the base plate and the inner periphery of the case and in contact with both. The spacer has a bonding surface with a side surface of the base plate and the first main surface in the contact with the outer periphery of the base plate.


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