The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 16, 2017
Filed:
Jun. 16, 2016
Applicant:
SK Hynix Memory Solutions Inc., San Jose, CA (US);
Inventors:
Assignee:
SK Hynix Memory Solutions Inc., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/34 (2006.01); G11C 16/26 (2006.01); G11C 29/42 (2006.01); G11C 29/44 (2006.01); G11C 16/04 (2006.01); G06F 11/07 (2006.01); G11C 16/08 (2006.01); G11C 7/02 (2006.01); G11C 29/52 (2006.01);
U.S. Cl.
CPC ...
G11C 16/3431 (2013.01); G06F 11/076 (2013.01); G06F 11/079 (2013.01); G06F 11/0727 (2013.01); G06F 11/0793 (2013.01); G11C 7/02 (2013.01); G11C 16/0483 (2013.01); G11C 16/08 (2013.01); G11C 16/26 (2013.01); G11C 16/349 (2013.01); G11C 29/42 (2013.01); G11C 29/52 (2013.01); G11C 16/3418 (2013.01); G11C 16/3422 (2013.01); G11C 16/3427 (2013.01);
Abstract
Memory systems may include a memory including a plurality of memory blocks and a controller. The controller calculates an effective read disturb based on both a direct neighbor read disturb count and a non-direct neighbor read disturb count. The controller selects a wordline with the largest effective read disturb for test read and deciding whether to reclaim the data of the block based on the errors on the wordline.