The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 16, 2017
Filed:
Sep. 03, 2015
Xilinx, Inc., San Jose, CA (US);
Vinod K. Kathail, Palo Alto, CA (US);
L. James Hwang, Portola Valley, CA (US);
Sundararajarao Mohan, Sunnyvale, CA (US);
Jorge E. Carrillo, San Jose, CA (US);
Hua Sun, San Jose, CA (US);
Tom Shui, Mountain View, CA (US);
Yogesh L. Chobe, Santa Clara, CA (US);
XILINX, INC., San Jose, CA (US);
Abstract
Implementing a system-on-chip (SOC) design specified as a high level programming language (HLL) application may include querying, using a computer, a platform description to determine an available interface of a platform for a target integrated circuit and generating, using the computer, hardware for a function of the HLL application marked for hardware acceleration and hardware coupling the marked function with the available interface of the platform. Implementing the SOC design may also include modifying, using the computer, the HLL application with program code configured to access the generated hardware for the marked function and building, using the computer, the hardware and the software of the SOC design.