The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 16, 2017

Filed:

Dec. 23, 2014
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Ramakrishnan Venkatasubramanian, Plano, TX (US);

Oluleye Olorode, Garland, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/10 (2016.01); G06F 12/1027 (2016.01); G06F 12/1009 (2016.01);
U.S. Cl.
CPC ...
G06F 12/1027 (2013.01); G06F 12/1009 (2013.01); G06F 2212/1024 (2013.01); G06F 2212/681 (2013.01); G06F 2212/684 (2013.01);
Abstract

This invention hides the page miss translation latency for program fetches. In this invention whenever an access is requested by CPU that crosses a memory page boundary, the L1I cache controller request a next page translation along with the current page. This pipelines requests to the μTLB without waiting for L1I cache controller to begin processing the next page requests. This becomes a deterministic prefetch of the second page translation request. The translation information for the second page is stored locally in L1I cache controller and used when the access crosses the next page boundary.


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