The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 16, 2017

Filed:

Dec. 05, 2013
Applicant:

National Instruments Corporation, Austin, TX (US);

Inventor:

Craig S. Jones, Austin, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/36 (2006.01); G06F 12/00 (2006.01); H04L 12/947 (2013.01); H04L 12/931 (2013.01); G06F 13/40 (2006.01); G06F 13/38 (2006.01); H04L 12/751 (2013.01);
U.S. Cl.
CPC ...
G06F 12/00 (2013.01); H04L 49/25 (2013.01); H04L 49/35 (2013.01); G06F 13/385 (2013.01); G06F 13/4022 (2013.01); G06F 13/4027 (2013.01); H04L 45/02 (2013.01);
Abstract

Smart bridge and use. The smart bridge includes a functional unit, memory, and a switch for routing data between a host and multiple devices using a routing table. The bridge stores a forwarding address range (FAR) as a bridge representation of hardware memory resources required by the devices. The FAR is an integer multiple of a first specified minimum size and is aligned with the first specified minimum size. The bridge representation is converted to an endpoint representation that includes multiple virtual memory resources based on a starting address of the FAR. Each virtual memory resource has a respective sub-address range with a size that is a power of 2 multiple of a second specified minimum size, which is less than the first specified minimum size, and is aligned accordingly. The endpoint representation is usable by the switch or the host to allocate the virtual memory resources to the devices.


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