The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 16, 2017

Filed:

Jul. 16, 2015
Applicants:

Boe Technology Group Co., Ltd., Beijing, CN;

Ordos Yuansheng Optoelectronics Co., Ltd., Ordos, Inner Mongolia, CN;

Inventors:

Yun Qiao, Beijing, CN;

Jian Sun, Beijing, CN;

Cheng Li, Beijing, CN;

Seongjun An, Beijing, CN;

Assignees:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/04 (2006.01); G02F 1/1362 (2006.01); G09G 3/36 (2006.01); H01L 27/02 (2006.01); H01L 27/12 (2006.01);
U.S. Cl.
CPC ...
G02F 1/136204 (2013.01); G02F 1/1362 (2013.01); G02F 1/136209 (2013.01); G02F 1/136286 (2013.01); G09G 3/3659 (2013.01); H01L 27/0255 (2013.01); H01L 27/124 (2013.01); H01L 27/127 (2013.01); G09G 3/3648 (2013.01); G09G 2300/043 (2013.01); G09G 2330/023 (2013.01);
Abstract

The invention provides an array substrate and a manufacturing method thereof, a display panel and a display device, the array substrate includes a base substrate, and a data line, a switching device and a voltage compensation module arranged on the base substrate, the switching device is connected between the data line and the voltage compensation module so that the data line is electrically connected to the voltage compensation module when a voltage on the data line is lower than a preset low voltage or higher than a preset high voltage. The array substrate uses a PN junction as the switching device between the data line and the voltage compensation module, and due to a low leakage current between a P terminal and an N terminal of the PN junction, the power consumption of the array substrate can be reduced.


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