The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 16, 2017

Filed:

May. 18, 2015
Applicant:

Catena Holding B.v., Delft, NL;

Inventor:
Assignee:

CATENA HOLDING B.V., Delft, NL;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/00 (2006.01); G01R 25/00 (2006.01); H03D 7/14 (2006.01); H03K 5/26 (2006.01); H03D 13/00 (2006.01);
U.S. Cl.
CPC ...
G01R 25/00 (2013.01); H03D 7/14 (2013.01); H03D 7/1433 (2013.01); H03D 7/1458 (2013.01); H03K 5/26 (2013.01); H03D 13/00 (2013.01);
Abstract

The method determines an input phase differential (Δφ) between two input signals. A phase detector is provided that has pairs of transistors and a first impedance (R) connected to a first branch carrying a first signal (Iout_left) and a second impedance (R) connected to a second branch carrying a second signal (Iout_right). The first signal (Iout_left) in the first branch is set as a first sum of a common mode output signal (Icm) and a differential mode output signal (Idm). The second signal (Iout_right) in the second branch is set as a second sum of the common mode output signal (Icm) minus the differential mode output signal (Idm). A relationship between the first impedance (R) and the second impedance (R) is adjusted until a differential mode output voltage (Vdm) of the phase detector is zero. The input phase differential (Δφ) is determined when the differential mode output voltage (Vdm) is zero.


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