The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 09, 2017
Filed:
Aug. 18, 2014
Applicant:
Imec, Leuven, BE;
Inventors:
Deniz Sabuncuoglu Tezcan, Neerwinden, BE;
Yann Civale, Leuven, BE;
Bart Swinnen, Holsbeek, BE;
Eric Beyne, Leuven, BE;
Assignee:
IMEC, Leuven, BE;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/528 (2006.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01);
U.S. Cl.
CPC ...
H01L 23/528 (2013.01); H01L 21/76898 (2013.01); H01L 23/481 (2013.01); H01L 23/5226 (2013.01); H01L 2924/0002 (2013.01);
Abstract
A semiconductor device having through-substrate vias is disclosed. In one aspect, the device includes a substrate having at least one front-end-of-line (FEOL) device and a back-end-of-line (BEOL) comprising a metal pad. The device additionally includes at least one first contact plug contacting the at least one FEOL device and at least one second contact plug underneath the metal pad and in electrical contact therewith. At least one second contact plug has one end contacting the metal pad and has other end contacting a material that is not part of a FEOL device.