The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 09, 2017

Filed:

Jul. 22, 2016
Applicant:

Kabushiki Kaisha Toshiba, Tokyo, JP;

Inventors:

Soichi Homma, Yokkaichi Mie, JP;

Masaya Shima, Oita Oita, JP;

Yuusuke Takano, Yokkaichi Mie, JP;

Takeshi Watanabe, Yokkaichi Mie, JP;

Katsunori Shibuya, Mie-gun Mie, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/28 (2006.01); H01L 23/31 (2006.01); H01L 23/495 (2006.01); H01L 25/065 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 21/78 (2006.01); H01L 21/52 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3142 (2013.01); H01L 21/4828 (2013.01); H01L 21/52 (2013.01); H01L 21/565 (2013.01); H01L 21/78 (2013.01); H01L 23/49541 (2013.01); H01L 23/49575 (2013.01); H01L 25/0657 (2013.01); H01L 2225/06527 (2013.01); H01L 2225/06555 (2013.01); H01L 2225/06572 (2013.01);
Abstract

In a method for manufacturing a semiconductor device, a resin layer including an inorganic filler is molded on a surface of a substrate which includes semiconductor elements attached thereto by an adhesive, and terminals electrically connected to the semiconductor elements on another surface thereof. The molded substrate is cut so as to expose a conductive body electrically connected to an external terminal maintainable at ground potential. The surface of the resin layer of the substrate is sputter-etched in a vacuum environment, in a state where a plurality of the cut substrates is provided in a tray so that the surface of the substrate faces the tray. A metal layer is sputtered so as to be electrically connected to the conductive body on the surface and the cut surface in a state where the substrate is provided in the tray while maintaining the vacuum environment after sputter-etching.


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