The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 09, 2017
Filed:
Jun. 25, 2015
Applicant:
Sony Corporation, Tokyo, JP;
Inventors:
Wataru Otsuka, Boise, ID (US);
Jun Sumino, Tokyo, JP;
Tomohito Tsushima, Tokyo, JP;
Makoto Kitagawa, Boise, ID (US);
Takafumi Kunihiro, Tokyo, JP;
Assignee:
Sony Semiconductor Solutions Corporation, Kanagawa, JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 13/00 (2006.01); H01L 45/00 (2006.01);
U.S. Cl.
CPC ...
G11C 13/004 (2013.01); G11C 13/003 (2013.01); G11C 13/0064 (2013.01); G11C 13/0097 (2013.01); H01L 45/08 (2013.01); H01L 45/1266 (2013.01); H01L 45/146 (2013.01); G11C 13/0011 (2013.01); G11C 2013/0054 (2013.01); G11C 2213/32 (2013.01); G11C 2213/79 (2013.01);
Abstract
A method of operation of a non-volatile memory system includes: providing a resistive storage element having a high resistance state and a low resistance state; coupling an analog multiplexer to the resistive storage element for applying a bias voltage; and switching between a verification bias and a read bias through the analog multiplexer for increasing a read margin between the high resistance state and the low resistance state.