The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 09, 2017

Filed:

Jan. 05, 2016
Applicant:

Kabushiki Kaisha Toshiba, Tokyo, JP;

Inventors:

Yinghao Ho, Kanagawa, JP;

Koichiro Zaitsu, Kanagawa, JP;

Shinichi Yasuda, Tokyo, JP;

Kosuke Tatsumura, Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 11/16 (2006.01); G11C 13/00 (2006.01); H01L 27/24 (2006.01); H01L 45/00 (2006.01); G11C 5/02 (2006.01); G11C 7/20 (2006.01); G11C 29/44 (2006.01);
U.S. Cl.
CPC ...
G11C 11/16 (2013.01); G11C 13/0002 (2013.01); G11C 13/0007 (2013.01); G11C 13/0069 (2013.01); H01L 27/2436 (2013.01); H01L 27/2463 (2013.01); H01L 45/04 (2013.01); H01L 45/06 (2013.01); H01L 45/085 (2013.01); H01L 45/126 (2013.01); H01L 45/1233 (2013.01); H01L 45/1253 (2013.01); H01L 45/145 (2013.01); H01L 45/146 (2013.01); G11C 5/025 (2013.01); G11C 7/20 (2013.01); G11C 2029/4402 (2013.01); G11C 2213/32 (2013.01); G11C 2213/52 (2013.01); G11C 2213/77 (2013.01);
Abstract

A look-up table circuit of an embodiment includes: first wiring lines; second wiring lines; resistive change elements disposed to intersection regions of the first and second wiring lines, each resistive change element including a first electrode connected to a corresponding one of the first wiring lines, a second electrode connected to a corresponding one of the second wiring lines; and a resistive change layer disposed between the first electrode and the second electrode; a first controller controlling voltages applied to the first wiring lines; a second controller controlling voltages applied to the second wiring lines; and a multiplexer including input terminals connected to the first wiring lines and an output terminal.


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