Level shift circuit, gate driving circuit and display apparatus

Abstract

Provided are a level shift circuit, a gate driving circuit and a display apparatus. The level shift circuit includes: a third to a sixth transistor, sources and gates thereof being connected to a DC power source and an offset voltage terminal respectively; a seventh transistor, source and gate thereof being connected to a reference ground and the offset voltage terminal respectively; and a first to a second transistor, gates and sources thereof being connected to an input signal terminal and drain of seventh transistor respectively, wherein drains of third and fifth transistors are connected as a first output terminal which is connected to drain of the first transistor, drains of fourth and sixth transistors are connected as a second output terminal which is connected to drain of the second transistor. Common-mode voltage of two output terminals of the level shift circuit with respect to the reference ground is not reduced.