The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 09, 2017

Filed:

Jul. 24, 2014
Applicant:

Samsung Display Co., Ltd., Yongin, Gyeonggi-Do, KR;

Inventor:

Ki-Myeong Eom, Suwon-si, KR;

Assignee:

Samsung Display Co., Ltd., Yongin-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/038 (2013.01); G09G 5/00 (2006.01); G09G 3/3266 (2016.01); G09G 3/3233 (2016.01);
U.S. Cl.
CPC ...
G09G 3/3266 (2013.01); G09G 3/3233 (2013.01); G09G 2300/0426 (2013.01); G09G 2300/0842 (2013.01); G09G 2300/0861 (2013.01); G09G 2310/0251 (2013.01);
Abstract

Provided is a scan driving circuit including a plurality of unit scan driving circuits, at least one of the plurality of unit scan driving circuits including: a first transistor configured to receive a prior scan signal in synchronization with a first clock signal and to respond to an enable level of the prior scan signal to output a second clock signal as a corresponding scan signal during one cycle of the first clock signal; a second transistor coupled between the first transistor and a first voltage; and a third transistor coupled to a gate of the second transistor and configured to be turned on by a first signal. A width of a first wire configured to transfer the first clock signal and a width of a second wire configured to transfer the second clock signal are larger than that of a third wire configured to transfer the first signal.


Find Patent Forward Citations

Loading…