The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 09, 2017

Filed:

Sep. 22, 2014
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Sven Hosp, Potsdam, DE;

Michael Goessel, Mahlow, DE;

Klaus Oberlaender, Neubiberg, DE;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 13/00 (2006.01); G06F 11/10 (2006.01); H03M 13/19 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1004 (2013.01); H03M 13/19 (2013.01); H03M 13/6502 (2013.01);
Abstract

A circuit arrangement for determining m check bits c, . . . , cfor k data bits u, . . . , uis provided, wherein the circuit arrangement includes a first subcircuit and a second subcircuit. The first subcircuit has k binary inputs for inputting the k data bits u=u, . . . , uand M binary outputs for outputting M binary intermediate values z, . . . , zdetermined from the data bits. The second subcircuit is configured to transform the intermediate values z, . . . , zinto the check bits c, . . . , c.


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