The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 09, 2017

Filed:

Jan. 15, 2015
Applicant:

Texas Instruments Deutschland Gmbh, Freising, DE;

Inventors:

Christian Wiencke, Garching, DE;

Max Gröning, Freising, DE;

Norbert Reichel, Wartenberg, DE;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 9/38 (2006.01); G06F 12/0875 (2016.01); G06F 9/30 (2006.01); G06F 12/14 (2006.01);
U.S. Cl.
CPC ...
G06F 9/381 (2013.01); G06F 9/30047 (2013.01); G06F 12/0875 (2013.01); G06F 12/1433 (2013.01); G06F 2212/1052 (2013.01); G06F 2212/452 (2013.01);
Abstract

An instruction cache includes instruction storage, a plurality of lock indicators, and control logic. The instruction storage includes a plurality of cache blocks to store instructions. Each of the lock indicators is associated with one of the cache blocks so as to control access to the associated cache block. The control logic is configured to: set to a write disable state, on access of a given one of the cache blocks, a given one of the lock indictors associated with the given one of the cache blocks; to determine whether a given instruction is stored in the instruction storage; and to deny write access to the given one of the cache blocks that is assigned to store the given instruction based on the given one of the block indicators being set to the write disable state.


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