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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9644270 B1

PDFFull Text
Date of Patent:
May. 09, 2017

Filed:

Oct. 14, 2014

Oxide semiconductor depositing apparatus and method of manufacturing oxide semiconductor using the same

Applicant:

Samsung Display Co., Ltd., Yongin, Gyeonggi-Do, KR;

Inventors:

Katsushi Kishimoto, Hwaseong-si, KR;

Yeon-Keon Moon, Seoul, KR;

Sang-Woo Sohn, Yongin-si, KR;

Takayuki Fukasawa, Seoul, KR;

Sang-Won Shin, Yongin-si, KR;

Assignee:

SAMSUNG DISPLAY CO., LTD., Gyeonggi-Do, KR;

Attorney:

Cantor Colburn LLP

Primary Examiner:

Shaun Campbell

Assistant Examiner:

Aneta Cieslewicz

Int. Cl.
CPC ...
C23C 16/50 (2006.01); H01L 29/786 (2006.01); H01L 29/66 (2006.01); H01L 21/67 (2006.01); C23C 16/40 (2006.01); C23C 16/509 (2006.01); H01L 21/677 (2006.01); H01L 21/3105 (2006.01); C23C 16/46 (2006.01); H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
C23C 16/50 (2013.01); C23C 16/40 (2013.01); C23C 16/46 (2013.01); C23C 16/509 (2013.01); H01L 21/3105 (2013.01); H01L 21/67109 (2013.01); H01L 21/67207 (2013.01); H01L 21/67745 (2013.01); H01L 29/66969 (2013.01); H01L 29/7869 (2013.01); H01L 29/78693 (2013.01); H01L 21/02554 (2013.01); H01L 21/02565 (2013.01);
Abstract

An oxide semiconductor depositing apparatus includes a heating chamber which is configured to heat and plasma-treat a first substrate including an insulation layer, and includes a chamber body, a heater disposed in the chamber body which is configured to heat the first substrate, and a cathode plate spaced apart from the heater, a high frequency voltage applied to the cathode plate, and a first process chamber which is configured to provide an oxide semiconductor layer on the insulation layer of the first substrate.

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