The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 02, 2017

Filed:

Nov. 03, 2015
Applicant:

Mitsubishi Electric Corporation, Tokyo, JP;

Inventor:

Yoshinobu Sasaki, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/06 (2006.01); H01L 23/66 (2006.01); H01L 23/00 (2006.01); H01L 25/16 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0682 (2013.01); H01L 23/66 (2013.01); H01L 24/49 (2013.01); H01L 24/48 (2013.01); H01L 25/16 (2013.01); H01L 2223/6611 (2013.01); H01L 2223/6655 (2013.01); H01L 2224/04042 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48195 (2013.01); H01L 2224/48247 (2013.01); H01L 2224/49112 (2013.01); H01L 2224/49113 (2013.01); H01L 2224/49175 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/1033 (2013.01); H01L 2924/1306 (2013.01); H01L 2924/19041 (2013.01); H01L 2924/19042 (2013.01); H01L 2924/19105 (2013.01); H01L 2924/19107 (2013.01);
Abstract

A semiconductor device includes a package, an input terminal fixed to the package, an input pre-matched substrate provided in the package, a semiconductor element provided in the package and formed on a substrate different from the input pre-matched substrate, a matching circuit including a circuit element formed on the input pre-matched substrate, a first wire for connecting the input terminal and the circuit element, and a second wire for connecting the circuit element and the semiconductor element, a first MIM capacitor formed as part of the circuit element, and a first stabilization circuit formed as part of the circuit element to reduce oscillation, wherein a lower electrode of the first MIM capacitor is connected to the package through a via provided in the input pre-matched substrate.


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