The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 02, 2017

Filed:

Jul. 25, 2016
Applicant:

Raydium Semiconductor Corporation, Hsinchu, TW;

Inventors:

Shin-Tai Lo, Miaoli, TW;

Cheng-Nan Lin, Taipei, TW;

Shao-Ping Hung, Hsinchu, TW;

Assignee:

Raydlum Semiconductor Corporation, Hsinchu County, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/70 (2006.01); H01L 23/50 (2006.01); H01L 27/02 (2006.01);
U.S. Cl.
CPC ...
H01L 23/50 (2013.01); H01L 27/0207 (2013.01);
Abstract

A driving circuit and a pin output order arranging method are disclosed. The driving circuit includes (M*N) pins and an arranging module. A first pin˜an N-th pin of the (M*N) pins, a (N+1)-th pin˜an 2N-th pin of the (M*N) pins, . . . , a [(M−1)*N+1]-th pin˜a (M*N)-th pin of the (M*N) pins are arranged along a first direction in a specific distance spaced to form a first row of pins˜an M-th row of pins. The first row of pins˜the M-th row of pins are staggered along a second direction in a staggering way or an aligning way. M and N are integers larger than 1. The arranging module correspondingly arranges the pin output order of the (M*N) pins according to different application modes of the driving circuit.


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