The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 02, 2017
Filed:
Jan. 07, 2015
Method and circuit for programming non-volatile memory cells of a volatile/non-volatile memory array
Applicants:
Commissariat À L'énergie Atomique ET Aux Énergies Alternatives, Paris, FR;
Centre National DE LA Recherche Scientifique, Paris, FR;
Inventors:
Virgile Javerliac, Grenoble, FR;
Christophe Layer, Grenoble, FR;
Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/08 (2006.01); G11C 14/00 (2006.01); G11C 11/00 (2006.01); G11C 11/16 (2006.01); G11C 11/419 (2006.01);
U.S. Cl.
CPC ...
G11C 14/009 (2013.01); G11C 11/005 (2013.01); G11C 11/1673 (2013.01); G11C 11/1675 (2013.01); G11C 11/419 (2013.01); G11C 14/0081 (2013.01);
Abstract
A memory array including: a first volatile memory cell including first and second cross-coupled inverters between first and second storage nodes; a first non-volatile memory cell including at least one resistive element that can be programmed to take one of at least two resistive states; and a control circuit adapted to couple the first non-volatile memory cell to the first and second storage nodes in order to generate a current for programming the resistive state of the at least one resistive element.