The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 02, 2017
Filed:
Jun. 01, 2015
Applicant:
Ps4 Luxco S.a.r.l., Luxembourg, LU;
Inventors:
Kayoko Shibata, Tokyo, JP;
Hiroaki Ikeda, Tokyo, JP;
Assignee:
Longitude Semiconductor S.a.r.l., Luxembourg, LU;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/407 (2006.01); H01L 23/544 (2006.01); H01L 23/535 (2006.01); H01L 23/522 (2006.01); H01L 25/065 (2006.01);
U.S. Cl.
CPC ...
G11C 11/407 (2013.01); H01L 23/5226 (2013.01); H01L 23/535 (2013.01); H01L 23/544 (2013.01); H01L 25/0657 (2013.01); H01L 2223/5444 (2013.01); H01L 2224/13025 (2013.01); H01L 2224/16 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06527 (2013.01); H01L 2225/06541 (2013.01); H01L 2924/00014 (2013.01);
Abstract
A method is disclosed for selecting a semiconductor chip in a stack of semiconductor chips interconnected by through-lines by receiving selection signals at the first terminals located on a first surface of the semiconductor chip, connecting each first terminal to a selected second terminal located on a second surface of the semiconductor chip where each selected second terminal is not aligned with the first terminal to which it is connected, and generating an internal signal based on a selected one of the received selection signals.