The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 02, 2017

Filed:

Dec. 05, 2014
Applicant:

Robert Bosch Gmbh, Stuttgart, DE;

Inventor:

Michael Frischke, Hemmingen, DE;

Assignee:

ROBERT BOSCH GMBH, Stuttgart, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); G06F 11/00 (2006.01); G01R 31/3185 (2006.01); G11C 29/04 (2006.01);
U.S. Cl.
CPC ...
G06F 17/5081 (2013.01); G06F 11/00 (2013.01); G06F 17/5054 (2013.01); G01R 31/318516 (2013.01); G01R 31/318519 (2013.01); G06F 17/5027 (2013.01); G06F 2217/14 (2013.01); G11C 2029/0411 (2013.01);
Abstract

A method is described for checking a hardware-configurable logic circuit including circuit areas and including a configuration memory having different subareas for faults, a respective configuration of hardware elements of one of the circuit areas being defined by configuration data stored in an associated subarea of the configuration memory, and when at least one checking requirement in regard to an output signal which is provided by the hardware-configurable logic circuit is met, a fault check of the configuration data being carried out only in those subareas of the configuration memory of the hardware-configurable logic circuit which are involved in generating the output signal.


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