The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 02, 2017

Filed:

Oct. 09, 2013
Applicant:

Firquest Llc, San Jose, CA (US);

Inventors:

Hillel Gazit, Palo Alto, CA (US);

Sohail Syed, San Jose, CA (US);

Gevorg Torjyan, Fremont, CA (US);

Assignee:

FIRQUEST LLC, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 15/167 (2006.01); H04L 12/743 (2013.01); G06F 17/30 (2006.01); G11C 15/00 (2006.01); G11C 13/00 (2006.01);
U.S. Cl.
CPC ...
G06F 15/167 (2013.01); G06F 17/30982 (2013.01); H04L 45/7457 (2013.01); G11C 13/0002 (2013.01); G11C 15/00 (2013.01);
Abstract

Systems and techniques relating to processing of network communications include, according to an aspect, a network device that includes circuitry configured to receive value bits selected from a group consisting of a zero bit, a one bit, and a don't care bit; and circuitry configured to store encoded representations of the value bits for use in network packet routing, wherein the encoded representations are position bits selected from a group consisting of a zero bit and a one bit; wherein the circuitry configured to store includes a first memory location and a second memory location that each eliminate a different combination of the value bits from being available for storage respectively in the first memory location and the second memory location.


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