The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 02, 2017

Filed:

Dec. 14, 2015
Applicant:

Marvell International Ltd., Hamilton, BM;

Inventors:

Saswat Mishra, Santa Clara, CA (US);

Tao Yu, Milpitas, CA (US);

Jungil Park, San Jose, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/00 (2006.01); G06F 15/177 (2006.01); G06F 11/14 (2006.01); G06F 9/44 (2006.01); G06F 11/22 (2006.01); G06F 11/263 (2006.01); G06F 7/02 (2006.01); G06F 21/73 (2013.01); G06F 12/14 (2006.01); G06F 21/64 (2013.01); G06F 21/56 (2013.01); G06F 21/57 (2013.01);
U.S. Cl.
CPC ...
G06F 11/1441 (2013.01); G06F 9/4403 (2013.01); G06F 11/2284 (2013.01); G06F 11/2635 (2013.01); G06F 7/02 (2013.01); G06F 11/1417 (2013.01); G06F 12/1408 (2013.01); G06F 21/565 (2013.01); G06F 21/57 (2013.01); G06F 21/575 (2013.01); G06F 21/64 (2013.01); G06F 21/73 (2013.01); G06F 2011/2278 (2013.01);
Abstract

The present disclosure describes methods and apparatus for implementing a signature-based sleep recovery operation flow for booting a system-on-chip (SoC). When the SoC begins its normal boot flow, a controller retrieves a sleep recovery signature from a register and compares the retrieved sleep recovery signature to a default signature. If the sleep recovery signature matches the default signature, the SoC enters a ROM checksum fail debug flow and, upon satisfying the requirements of the ROM checksum fail debug flow, enters a sleep recovery boot flow, which restores the SoC to the operational state it was in prior to entering the sleep mode. If the sleep recovery signature does not match the default signature, the SoC continues with the normal boot flow or, by use of external pins, can be forced into a normal debug mode flow so that the boot code can be debugged.


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