The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 25, 2017

Filed:

Jul. 01, 2015
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Ashok Swaminathan, Cardiff, CA (US);

Christian Venerus, San Diego, CA (US);

Marzio Pedrali-Noy, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/06 (2006.01); H03L 7/099 (2006.01); H03B 5/04 (2006.01); H03L 1/00 (2006.01);
U.S. Cl.
CPC ...
H03L 7/099 (2013.01); H03B 5/04 (2013.01); H03L 1/00 (2013.01); H03B 2202/042 (2013.01); H03B 2202/06 (2013.01);
Abstract

Methods, systems, and circuits for providing compensation for voltage variation are disclosed. A system includes: a voltage comparator configured to assert a control signal in response to detecting that one or more of power supply voltages droops below a threshold amount; a phase locked loop (PLL) configured to divide an output frequency for the PLL in response to the assertion of the control signal; a plurality of voltage sensors corresponding to the plurality of power supply voltages, the voltage sensors configured to output respective digital signals indicative of a voltage level of its corresponding power supply voltage; and a control circuit configured to control an oscillator frequency in the PLL during the open-loop mode responsive to the respective digital signals.


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