The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 25, 2017

Filed:

Aug. 05, 2016
Applicant:

Topconn Electronic (Kunshan) Co., Ltd, Suzhou, Jiangsu Province, CN;

Inventors:

Chung-Nan Pao, New Taipei, TW;

Yu-Feng Ke, Taoyuan County, TW;

Sun-Yu Chou, New Taipei, TW;

Wei Wang, Suzhou, CN;

Assignee:

TOPCONN ELECTRONIC (KUNSHAN) CO., LTD., Suzhou, Jiangsu Province, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01R 9/05 (2006.01); H01R 13/6471 (2011.01);
U.S. Cl.
CPC ...
H01R 13/6471 (2013.01);
Abstract

A differential signal assembly includes two pairs of differential signal wafers arranged in one row. Each differential signal wafer includes a plurality of mating portions arranged in one column and a plurality of mounting portions arranged in one column. In one of the two pairs of differential signal wafers, each differential signal wafer has a grounding pin and an offset grounding pin respectively arranged at two opposite ends of the column of mounting portions thereof, each offset grounding pin has an offset with respect to the corresponding column of mounting portions, the two distal ends of the mounting portions of each differential signal wafer are two signal mounting portions, cooperating with the two signal mounting portions of the other differential signal wafer. Thus, the grounding pin and the offset grounding pin of each differential signal wafer are configured to shield the adjacent signal mounting portions.


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