The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 25, 2017

Filed:

May. 22, 2014
Applicant:

Imec, Leuven, BE;

Inventors:

Brice De Jaeger, Leuven, BE;

Marleen Van Hove, Blanden, BE;

Stefaan Decoutere, Leuven, BE;

Steve Stoffels, Leuven, BE;

Assignee:

IMEC, Leuven, BE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/45 (2006.01); H01L 21/285 (2006.01); H01L 29/778 (2006.01); H01L 29/66 (2006.01); H01L 29/417 (2006.01); H01L 29/20 (2006.01);
U.S. Cl.
CPC ...
H01L 29/454 (2013.01); H01L 21/28575 (2013.01); H01L 29/452 (2013.01); H01L 29/66462 (2013.01); H01L 29/7783 (2013.01); H01L 29/7786 (2013.01); H01L 29/2003 (2013.01); H01L 29/41766 (2013.01);
Abstract

The disclosure relates to a method for manufacturing an Au-free ohmic contact for an III-nitride (III-N) device on a semiconductor substrate and to a III-N device obtainable therefrom. The III-N device includes a buffer layer, a channel layer, a barrier layer, and a passivation layer. A 2DEG layer is formed at an interface between the channel layer and the barrier layer. The method includes forming a recess in the passivation layer and in the barrier layer up to the 2DEG layer, and forming an Au-free metal stack in the recess. The metal stack comprises a Ti/Al bi-layer, with a Ti layer overlying and in contact with a bottom of the recess, and a Al layer overlying and in contact with the Ti layer. A thickness ratio of the Ti layer to the Al layer is between 0.01 to 0.1. After forming the metal stack, a rapid thermal anneal is performed. Optionally, prior to forming the Ti/Al bi-layer, a silicon layer may be formed in contact with the recess.


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