The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 25, 2017

Filed:

Jan. 20, 2016
Applicant:

Kabushiki Kaisha Toshiba, Minato-ku, Tokyo, JP;

Inventor:

Sachio Hayashi, Kawasaki Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 23/498 (2006.01); H01L 21/66 (2006.01); H01L 27/02 (2006.01);
U.S. Cl.
CPC ...
H01L 24/49 (2013.01); H01L 22/20 (2013.01); H01L 23/49838 (2013.01); H01L 24/03 (2013.01); H01L 24/09 (2013.01); H01L 24/85 (2013.01); H01L 27/0248 (2013.01); H01L 2224/04042 (2013.01); H01L 2224/48227 (2013.01); H01L 2924/1301 (2013.01);
Abstract

A semiconductor device includes a semiconductor chip including first to fourth pads, and first and second switches. The first switch includes first and second nodes coupled to the first and second pads and sends from the second node a current larger than a threshold flowing in from the first node. The second switch includes third and fourth nodes coupled to the third and fourth pads and sends from the fourth node a current larger than a threshold flowing in from the third node. The third and fourth nodes are not coupled to any nodes of high and low potentials of any circuit which receives the potentials to operate. A first wire is coupled to the first pad and the first conductor, and a second wire is coupled to the second pad and the second conductor.


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