The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 25, 2017
Filed:
Apr. 22, 2016
Applicant:
Rohm Co., Ltd., Ukyo-ku, Kyoto, JP;
Inventor:
Hirotoshi Usui, Kyoto, JP;
Assignee:
ROHM CO., LTD., Kyoto, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01); H05K 7/18 (2006.01); H01L 21/00 (2006.01); H01L 23/00 (2006.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
H01L 23/4952 (2013.01); H01L 23/49503 (2013.01); H01L 23/49537 (2013.01); H01L 23/49541 (2013.01); H01L 23/49548 (2013.01); H01L 23/49838 (2013.01); H01L 24/42 (2013.01); H01L 24/46 (2013.01); H01L 24/49 (2013.01); H01L 24/85 (2013.01); H01L 2224/05554 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/4909 (2013.01); H01L 2224/4912 (2013.01); H01L 2224/49171 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/386 (2013.01);
Abstract
A package includes: a plurality of lead frames configured to extend inwardly from an outer circumferential portion of the package; a die pad region surrounded with the lead frames in a plane view; a semiconductor chip mounted on the die pad region; a plurality of bonding pads disposed on the semiconductor chip; and a plurality of bonding wires configured to connect the lead frames and the bonding pads, respectively, wherein the bonding wires are respectively connected to front end portions of the lead frames by bonding with an angle ranging from 45 to 135 degrees with respect to a trace of front end portions of the lead frames in the plane view.