The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 25, 2017
Filed:
Sep. 08, 2015
Xilinx, Inc., San Jose, CA (US);
Ting Lu, Austin, TX (US);
Nishit Patel, San Jose, CA (US);
Ahmad R. Ansari, San Jose, CA (US);
James J. Murray, Constantia, ZA;
Sagheer Ahmad, Cupertino, CA (US);
XILINX, INC., San Jose, CA (US);
Abstract
In approaches for correction of errors introduced in an interconnect circuit, an ECC proxy circuit is coupled between a first interconnect and the second interconnect, and generates for each of the write transactions from a bus master circuit, a first ECC from and associated with data of the write transaction, and transmits the write transaction and associated first ECC on the second interconnect. The ECC proxy circuit also supplements each of the read transactions from the bus master circuit with a reference to a second ECC associated with data referenced by the read transaction. The ECC proxy circuit transmits the read transaction that references the second ECC on the second interconnect. At least one random access memory (RAM) is coupled to the ECC proxy circuit through the second interconnect. The RAM stores data of each write transaction and the first ECC.