The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 18, 2017

Filed:

Mar. 10, 2015
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Ojas Mahendra Choksi, San Diego, CA (US);

Bin Fan, San Diego, CA (US);

Bassel Hanafi, San Diego, CA (US);

Assignee:

QUALCOMM INCORPORATED, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 3/45 (2006.01); H03F 1/56 (2006.01); H03F 1/32 (2006.01); H03F 1/34 (2006.01); H03F 3/193 (2006.01); H03F 3/195 (2006.01); H04B 1/525 (2015.01);
U.S. Cl.
CPC ...
H03F 1/565 (2013.01); H03F 1/3211 (2013.01); H03F 1/347 (2013.01); H03F 3/193 (2013.01); H03F 3/195 (2013.01); H03F 3/45071 (2013.01); H03F 3/45188 (2013.01); H03F 3/45475 (2013.01); H03F 2200/294 (2013.01); H03F 2200/301 (2013.01); H03F 2200/451 (2013.01); H03F 2200/54 (2013.01); H03F 2203/21112 (2013.01); H03F 2203/45306 (2013.01); H03F 2203/45318 (2013.01); H03F 2203/45386 (2013.01); H03F 2203/45562 (2013.01); H03F 2203/45616 (2013.01); H03F 2203/45621 (2013.01); H04B 1/525 (2013.01);
Abstract

An apparatus includes: first and second transistors, each of the first and second transistors includes a gate terminal, a source terminal, and a drain terminal; and a transformer including a primary winding and first and second secondary windings, the primary winding is coupled to a first input node configured to receive an input signal and a second input node configured to receive a potential, the first and second secondary windings are coupled to gate terminals of the first and second transistors and cross-coupled to source terminals of the first and second transistors.


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