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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9627557 B1

PDFFull Text
Date of Patent:
Apr. 18, 2017

Filed:

Sep. 23, 2013

Solar cell

Applicant:

Sanyo Electric Co., Ltd., Moriguchi, Osaka, JP;

Inventors:

Mamoru Arimoto, Kobe, JP;

Yasuko Hirayama, Kobe, JP;

Takahiro Mishima, Kobe, JP;

Kazunori Fujita, Kobe, JP;

Assignee:

Panasonic Intellectual Property Management Co., Ltd., Osaka, JP;

Attorney:

Mots Law, PLLC

Primary Examiner:

Eric R Smith

Int. Cl.
CPC ...
H01L 31/0224 (2006.01); H01L 31/068 (2012.01); H01L 31/0747 (2012.01);
U.S. Cl.
CPC ...
H01L 31/022441 (2013.01); H01L 31/02245 (2013.01); H01L 31/0682 (2013.01); H01L 31/0747 (2013.01); Y02E 10/547 (2013.01);
Abstract

The solar cell () of the present invention is provided with an n-side electrode (), a p-side electrode (), and a photoelectric conversion unit () having a first main surface () and a second main surface (). The first main surface () includes an n-type surface () and a p-type surface (). The photoelectric conversion unit () has a semiconductor substrate () and a semiconductor layer (). The semiconductor substrate () has first and second main surfaces (). The semiconductor layer () is arranged on a portion of the first main surface (). The semiconductor layer () constitutes either the n-type surface () or the p-type surface (). The semiconductor layer () includes a relatively thick portion () and a relative thin portion (). The n-side electrode () or the p-side electrode () is arranged on at least the relatively thin portion () of the semiconductor layer (). The solar cell of the present invention, by means of the aforementioned configuration, is able to extend the lifetime of the minor carriers by means of the relatively thick portion (), to maintain low resistance between the semiconductor substrate () and the n-side electrode () by means of the relatively thin portion (), and to increase hole and electron collection efficiency.

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