The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 18, 2017

Filed:

Aug. 13, 2015
Applicant:

Fujitsu Limited, Kawasaki-shi, Kanagawa, JP;

Inventors:

Hideki Matsui, Kanazawa, JP;

Kuniaki Fujii, Hakui, JP;

Assignee:

FUJITSU LIMITED, Kwasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 5/14 (2006.01); G06F 5/06 (2006.01); G06F 13/42 (2006.01); G06F 13/40 (2006.01); G06F 11/07 (2006.01); G06F 11/30 (2006.01);
U.S. Cl.
CPC ...
G06F 5/14 (2013.01); G06F 5/065 (2013.01); G06F 11/0745 (2013.01); G06F 11/0757 (2013.01); G06F 11/3024 (2013.01); G06F 11/3027 (2013.01); G06F 13/4022 (2013.01); G06F 13/4282 (2013.01); G06F 11/3031 (2013.01);
Abstract

A control device includes a first processor, a relay device, a second processor, and a third processor. The first processor is configured to perform data communications with an electronic device. The relay device is configured to relay the data communications. The relay device includes a buffer for storing data to be transmitted or received in the data communications. The second processor is configured to check a state of the buffer to detect a buffer full state in which the buffer is full. The third processor is configured to check a state of the first processor to detect a halt state in which the first processor has halted. The third processor is configured to reset the relay device upon detecting the halt state and upon the second processor detecting the buffer full state.


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