The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9625524 B1

PDF
Full Text
Expired
Date of Patent:
Apr. 18, 2017

Filed:

Aug. 27, 2015
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Teck Seng Eng, Singapore, SG;

Michael Russell Uy Gonzales, Quezon Province, PH;

Louie Que Hermosura, Singapore, SG;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/317 (2006.01); G01R 31/28 (2006.01); G01R 31/3177 (2006.01);
U.S. Cl.
CPC ...
G01R 31/3177 (2013.01); G01R 31/2832 (2013.01); G01R 31/2894 (2013.01); G01R 31/31718 (2013.01);
Abstract

Efficient production testing of integrated circuits. A first production test is implemented on a group of integrated circuits and failures among the test group are assessed. Specifically, the results of the first test are analyzed such that integrated circuits having a recoverable fail and integrated circuits having a non-recoverable fail are differentiated. The integrated circuits are integrated based on the analyzed results and a second production test is implemented. The second production test tests the integrated circuits responsive to the segregation, such that the second production test is limited only to integrated circuits with a recoverable fail. The next succeeding production test will then use the new test program in the second production test with the handler bin designated as having integrated circuits not to be re-tested.


Find Patent Forward Citations

Eng, Teck. (2017). Efficient method of retesting integrated circuits (U.S. Patent No. 9625524). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9625524

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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