The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 11, 2017

Filed:

Sep. 02, 2012
Applicants:

Ding-yun Chen, Taipei, TW;

Cheng-tsai Ho, Taichung, TW;

Chi-cheng Ju, Hsinchu, TW;

Chung-hung Tsai, Hsinchu, TW;

Inventors:

Ding-Yun Chen, Taipei, TW;

Cheng-Tsai Ho, Taichung, TW;

Chi-Cheng Ju, Hsinchu, TW;

Chung-Hung Tsai, Hsinchu, TW;

Assignee:

MEDIATEK INC., Hsin-chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04N 19/436 (2014.01); H04N 19/61 (2014.01);
U.S. Cl.
CPC ...
H04N 19/436 (2014.11); H04N 19/61 (2014.11);
Abstract

A method and computer readable medium storing a corresponding computer program for decoding a video bitstream based on processors using dynamic load balancing are disclosed. In one embodiment of the present invention, the method configures multiple processors to perform the multiple processing modules including a prediction module by mapping the multiple processing modules to the multiple processors. One or more buffer queues are used among said multiple processing modules and the mapping the prediction module to the multiple processors is based on the level of the buffer queue. The multiple processors may correspond to a multi-core Central Processing Unit (CPU) comprising of multiple CPUs or a multi-core Digital Signal Processor (DSP) comprising of multiple DSPs to practice the present invention.


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